Conventionally, monolithic circuits, including MMIC amplifiers, are fabricated on a semiconductor wafer, diced up into a large number of individual circuits and mounted onto RF substrates. Each RF substrate may be individually biased and may include large bypass capacitors to reduce the amount of RF energy on the bias lines for each substrate. Instead of being diced up into separate individual circuits, monolithic arrays may include a large number of monolithic circuits on a single RF semiconductor substrate. One problem with these conventional bias-line bypassing techniques for monolithic arrays is that the bypass capacitors required do not fit within the limited space available on a wafer.
Some conventional bias-line bypassing techniques use a number of different size capacitors to provide bypassing over a wide frequency range. Large capacitors used to bypass low frequencies, do not always fit within the limited available space, and it may become necessary to distribute a larger number of capacitors around a bias line. Unfortunately, a larger number of capacitors increases the probability that defective capacitors may short to ground causing the circuit to become inoperable.
Thus, there are general needs for improved bias-line bypassing techniques for monolithic arrays. There are also needs for bias-line bypassing techniques that reduce the risk and problems associated with capacitor failure.